1. Technical Field
This invention is related to the field of integrated circuit implementation, and more particularly to the implementation of multiple clock domains.
2. Description of the Related Art
Computing systems may include one or more systems-on-a-chip (SoC), which may integrate a number of different functions, such as graphics processing, onto a single integrated circuit. With numerous functions included in a single integrated circuit, chip count may be kept low in mobile computing systems, such as tablets, for example, which may result in a smaller form factor for such mobile computing systems.
As semiconductor process technology has continued to evolve, device geometries continue to shrink, allowing a higher density of devices per unit area. With an increased density of devices, increased levels of integration may be possible, allowing for more functional blocks with increased complexity to integrated into a single SoC.
With higher levels of integration and higher performing devices, power consumption may be a limiting factor, particularly in mobile computing applications such as, e.g., tablets or cellular telephones. Different design techniques and architectures may be employed to limit dynamic power. In some designs, multiple clock signals may be employed allowing different functional blocks within an SoC to operate at different frequencies, and allowing clocks to be stopped for a given functional block within the SoC when the block's functionality is not presently required. Other designs may allow for the frequency of a clock to a functional block to be changed responsive to variations in demand for compute resources. Some SoC designs may require a large number of clock frequencies. In such cases, clock generation circuitry may be a significant source of dynamic power consumption.